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CY7C1145KV18, CY7C1143KV18 18-Mbit QDR II+ SRAM Four-Word Burst Architecture

CY7C1145KV18 Description

 CY7C1143KV18/CY7C1145KV18 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) 18-Mbit QDR® II+ SRAM Four-Word Burst Archite.

CY7C1145KV18 Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 450-MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) Interfaces on both read and write ports (data transferred at 900 MHz) at 450 MHz

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: CY7C1145KV18, CY7C1143KV18. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
CY7C1145KV18, CY7C1143KV18
Manufacturer
Cypress Semiconductor
File Size
646.01 KB
Datasheet
CY7C1143KV18-CypressSemiconductor.pdf
Description
18-Mbit QDR II+ SRAM Four-Word Burst Architecture
Note
This datasheet PDF includes multiple part numbers: CY7C1145KV18, CY7C1143KV18.
Please refer to the document for exact specifications by model.

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📌 All Tags

18-Mbit QDR II + SRAM Four-Word Burst Architecture Cypress Semiconductor
Cypress Semiconductor CY7C1145KV18-like datasheet