CY7C1145KV18 - 18-Mbit QDR II+ SRAM Four-Word Burst Architecture
CY7C1145KV18 Features
* Separate independent read and write data ports
* Supports concurrent transactions
* 450-MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) Interfaces on both read and write ports (data transferred at 900 MHz) at 450 MHz
