CY7C1148KV18 Datasheet - Cypress Semiconductor

CY7C1148KV18, 18-Mbit DDR II+ SRAM Two-Word Burst Architecture

CY7C1148KV18/CY7C1150KV18 18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) 18-Mbit DDR II+ SRAM Two-Word Burst Architecture .

datasheet Preview Page 1 from Datasheet4u.com

CY7C1148KV18-CypressSemiconductor.pdf

CY7C1148KV18 Datasheet Preview — Preview of CY7C1148KV18 PDF

Datasheet Details

Part number:

CY7C1148KV18

Manufacturer:

Cypress Semiconductor

File Size:

610.31 KB

Description:

18-Mbit DDR II+ SRAM Two-Word Burst Architecture

Features

* 18-Mbit density (1M × 18, 512K × 36)
* 450-MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces (data transferred at 900 MHz) at 450 MHz
* Available in 2.0 clock cycle latency
* Two input clocks (K and K) for p

CY7C1148KV18 Distributors

📁 Related Datasheet

CY7C1006D CY7C1011G CY7C1041G CY7C1041GE CY7C1041GN CY7C1049GN

📌 All Tags

CY7C1148KV18 18-Mbit DDR II + SRAM Two-Word Burst Architecture Cypress Semiconductor

Cypress Semiconductor CY7C1148KV18-like datasheet