Datasheet Details
| Part number | CY7C1218H | 
|---|---|
| Manufacturer | Cypress Semiconductor | 
| File Size | 424.52 KB | 
| Description | 1-Mbit (32K x36) Pipelined Sync SRAM | 
| Datasheet | 
        
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		  | Part number | CY7C1218H | 
|---|---|
| Manufacturer | Cypress Semiconductor | 
| File Size | 424.52 KB | 
| Description | 1-Mbit (32K x36) Pipelined Sync SRAM | 
| Datasheet | 
        
           | 
    
1] The CY7C1218H SRAM integrates 32K x 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE1), depth-expansion Chip Enables (CE2 and CE3), Burst Control inputs (ADSC, ADSP, and ADV), Write Enables (BW[A:D], and BWE), and Global Write (GW
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