CY7C1241V18 - 36-Mbit QDR-II SRAM 4-Word Burst Architecture

Cypress Semiconductor

CY7C1241V18 Description

CY7C1241V18 CY7C1256V18 CY7C1243V18 CY7C1245V18 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) .
The CY7C1241V18, CY7C1256V18, CY7C1243V18, and CY7C1245V18 are 1.

CY7C1241V18 Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 300 MHz to 375 MHz clock for high bandwidth
* 4-Word Burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both read and write ports (data transferr

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CY7C1241V18 Datasheet Preview — Preview of CY7C1241V18 PDF

Datasheet Details

Part number: CY7C1241V18
Manufacturer: Cypress Semiconductor
File Size: Direct Link
Datasheet: CY7C1241V18_CypressSemiconductor.pdf
Description: 36-Mbit QDR-II SRAM 4-Word Burst Architecture

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36-Mbit QDR-II SRAM 4-Word Burst Architecture Cypress Semiconductor

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