The CY7C1241V18, CY7C1256V18, CY7C1243V18, and CY7C1245V18 are 1.8V Synchronous Pipelined SRAMs, equipped with Quad Data Rate-II+ (QDR-II+) architecture.
QDR-II+ architecture consists of two separate ports to access the memory array.
The read port has dedicated data outputs to support read operation
CY7C1243V18 Features
* Separate independent read and write data ports
* Supports concurrent transactions
* 300 MHz to 375 MHz clock for high bandwidth
* 4-Word Burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both read and write ports (data transferr
CY7C1241V18_CypressSemiconductor.pdf
Datasheet Details
CY7C1243V18, CY7C1241V18
Cypress Semiconductor
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36-mbit qdr-ii sram 4-word burst architecture.
This datasheet PDF includes multiple part numbers: CY7C1243V18, CY7C1241V18.
Please refer to the document for exact specifications by model.
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