CY7C1313CV18, CY7C1311CV18 Datasheet - Cypress Semiconductor

CY7C1313CV18 (CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture

The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to suppor.

CY7C1313CV18 Features

* Configurations CY7C1311CV18

* 2M x 8 CY7C1911CV18

* 2M x 9 CY7C1313CV18

* 1M x 18 CY7C1315CV18

* 512K x 36 Separate independent read and write data ports

* Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address

CY7C1311CV18_CypressSemiconductor.pdf

CY7C1313CV18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1313CV18, CY7C1311CV18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1313CV18, CY7C1311CV18

Manufacturer:

Cypress Semiconductor

File Size:

731.88 KB

Description:

(cy7c1x1xcv18) 18-mb qdrtm-ii sram 4-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1313CV18, CY7C1311CV18.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1313CV18 CY7C1311CV18 CY7C1x1xCV18 18-Mb QDRTM-II SRAM 4-Word Burst Architecture Cypress Semiconductor

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