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CY7C1412V18 SRAM 2-Word Burst Architecture

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Description

PRELIMINARY CY7C1410V18 CY7C1425V18 CY7C1412V18 CY7C1414V18 36-Mbit QDR-II™ SRAM 2-Word Burst Architecture .
The CY7C1410V18, CY7C1425V18, CY7C1412V18, and CY7C1414V18 are 1.

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Datasheet Specifications

Part number
CY7C1412V18
Manufacturer
Cypress Semiconductor
File Size
459.26 KB
Datasheet
CY7C1412V18_CypressSemiconductor.pdf
Description
SRAM 2-Word Burst Architecture

Features

* Separate Independent Read and Write data ports
* Supports concurrent transactions
* 200-MHz clock for high bandwidth
* 2-Word Burst on all accesses
* Double Data Rate (DDR) interfaces on both Read and Write ports (data transferred at 400 MHz) @ 200 MHz www. D

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