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CY7C1461AV25 Flow-Through SRAM

CY7C1461AV25 Description

CY7C1461AV25 CY7C1463AV25 www.DataSheet4U.com CY7C1465AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM with NoBL™ Architecture .
1] The CY7C1461AV25/CY7C1463AV25/CY7C1465AV25 are 2.

CY7C1461AV25 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Can support up to 133-MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin-compatible and functionally equivalent to ZBT™ devices
* Int

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Flow-Through SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1461AV25-like datasheet