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CY7C1461KV33 36-Mbit (1M x 36/2M x 18) Flow-Through SRAM

CY7C1461KV33 Description

CY7C1461KV33 CY7C1463KV33 36-Mbit (1M × 36/2M × 18) Flow-Through SRAM with NoBL™ Architecture 36-Mbit (1M × 36/2M × 18) Flow-Through SRAM with NoBL™ .

CY7C1461KV33 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Supports up to 133 MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin compatible and functionally equivalent to ZBT™ devices
* Internally self timed o

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Datasheet Details

Part number
CY7C1461KV33
Manufacturer
Cypress Semiconductor
File Size
954.99 KB
Datasheet
CY7C1461KV33-CypressSemiconductor.pdf
Description
36-Mbit (1M x 36/2M x 18) Flow-Through SRAM

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📌 All Tags

36-Mbit Flow-Through SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1461KV33-like datasheet