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CY7C1512AV18, CY7C1510AV18 72-Mbit QDR-II SRAM 2-Word Burst Architecture

CY7C1512AV18 Description

CY7C1510AV18, CwYww7.DCat1a5Sh2ee5t4AU.Vco1m8 CY7C1512AV18, CY7C1514AV18 72-Mbit QDR™-II SRAM 2-Word Burst Architecture .
Maximum Operating Frequency Maximum Operating Current x8 x9 x18 x36 250 MHz 250 1230 1240 1350 1560 Configurations CY7C1510AV18. 8M x.

CY7C1512AV18 Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 250 MHz clock for high bandwidth
* 2-word burst on all accesses
* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 500 MHz) at 250 MHz
* Two input clocks (

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This datasheet PDF includes multiple part numbers: CY7C1512AV18, CY7C1510AV18. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
CY7C1512AV18, CY7C1510AV18
Manufacturer
Cypress Semiconductor
File Size
690.83 KB
Datasheet
CY7C1510AV18_CypressSemiconductor.pdf
Description
72-Mbit QDR-II SRAM 2-Word Burst Architecture
Note
This datasheet PDF includes multiple part numbers: CY7C1512AV18, CY7C1510AV18.
Please refer to the document for exact specifications by model.

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Cypress Semiconductor CY7C1512AV18-like datasheet