CY7C1525V18 Features
* Separate independent read and write data ports
* Supports concurrent transactions
* 250 MHz clock for high bandwidth
* 2-word burst on all accesses
* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 500 MHz) at 250 MHz
* Two input clocks
CY7C1510V18-CypressSemiconductor.pdf
Datasheet Details
CY7C1525V18, CY7C1510V18
Cypress Semiconductor
389.43 KB
1.8v synchronous pipelined sram.
This datasheet PDF includes multiple part numbers: CY7C1525V18, CY7C1510V18.
Please refer to the document for exact specifications by model.
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