CY7C152xV18 Datasheet - Cypress Semiconductor

CY7C152xV18 (CY7C1xxxxVxx) RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata

CY7C129 DV18/CY7C130 DV25 CY7C130 BV18/CY7C130 BV25/CY7C132 BV25 CY7C131 BV18 / CY7C132 BV18/CY7C139 BV18 CY7C191 BV18/CY7C141 AV18 / CY7C142 AV18/ CY7C151 V18 /CY7C152 V18 Errata Revision: C May 02, 2007 RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision .

CY7C152xV18 Features

* ISSUE DEFINITION If the input clock (K Clock) is left floating when the device is in JTAG mode, spurious high frequency noise on this input can be interpreted by the device as valid clocks. This could cause the impedance matchi

CY7C152xV18 Datasheet (279.66 KB)

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Datasheet Details

Part number:

CY7C152xV18

Manufacturer:

Cypress Semiconductor

File Size:

279.66 KB

Description:

(cy7c1xxxxvxx) ram9 qdr-i/ddr-i/qdr-ii/ddr- ii errata.

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CY7C152xV18 CY7C1xxxxVxx RAM9 QDR-I DDR-I QDR-II DDR- Errata Cypress Semiconductor

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