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CY7C1373DV25 (CY7C1371DV25 / CY7C1373DV25) Flow-Through SRAM

CY7C1373DV25 Description

CY7C1371DV25 www.DataSheet4U.com CY7C1373DV25 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture .
1] The CY7C1371DV25/CY7C1373DV25 is a 2.

CY7C1373DV25 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Can support up to 133-MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin compatible and functionally equivalent to ZBT™ devices
* Int

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Datasheet Details

Part number
CY7C1373DV25
Manufacturer
Cypress Semiconductor
File Size
486.89 KB
Datasheet
CY7C1373DV25_CypressSemiconductor.pdf
Description
(CY7C1371DV25 / CY7C1373DV25) Flow-Through SRAM

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📌 All Tags

CY7C1371DV25 CY7C1373DV25 Flow-Through SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1373DV25-like datasheet