* Low RDS (on) HDMOSTM process Rugged polysilicon gate cell structure International standard package Fast switching times Symbol Test Conditions Characteristic Values Min. Typ. 200 2.0 4.0 ±100 TJ = 25°C TJ = 125°C 500 3 35 Max. V V nA µA mA mΩ (TJ = 25°C unless otherwise specified) VDSS V
IXTH68N20 Datasheet (279.05 KB)
IXTH68N20
IXYS Corporation
279.05 KB
Power mosfet.
High Current MegaMOSTMFET
N-Channel Enhancement Mode
VDSS IXTK 74 N20 IXTH 68 N20 200 V 200 V
ID25
RDS(on)
74 A 35 mW 68 A 35 mW
Preliminary data.
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