ICS87004AGT Datasheet PDF - Integrated Circuit Systems 1:4/ DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR Specs

ICS87004AGT - 1:4/ DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR

Datasheet Summary

Description

The ICS87004 is a highly versatile 1:4 Differentialto-LVCMOS/LVTTL Clock Generator and a memHiPerClockS™ ber of the HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS87004 has two selectable clock inputs.

Features

4 LVCMOS/LVTTL outputs, 7Ω typical output impedance.
Selectable CLK0, nCLK0 or CLK1, nCLK1 clock inputs.
CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL.
Internal bias on nCLK0 and nCLK1 to support LVCMOS/LVTTL levels on CLK0 and CLK1 inputs.
Output frequency range: 15.625MHz to 250MHz.
Input frequency range: 15.625MHz to 250MHz.
VCO range: 250MHz to 500MHz.
External fe.

Datasheet Details

Part number	ICS87004AGT
Manufacturer	Integrated Circuit Systems
File Size	185.17 KB
Description	1:4/ DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR
Datasheet	ICS87004AGT Datasheet
Additional preview pages of the ICS87004AGT datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS87004 1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR FEATURES • 4 LVCMOS/LVTTL outputs, 7Ω typical output impedance • Selectable CLK0, nCLK0 or CLK1, nCLK1 clock inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Internal bias on nCLK0 and nCLK1 to support LVCMOS/LVTTL levels on CLK0 and CLK1 inputs • Output frequency range: 15.625MHz to 250MHz • Input frequency range: 15.

Published: Apr 16, 2005 |