ICS87004I - Differential-to-LVCMOS/LVTTL Zero Delay Clock Generator

Product Overview

IDT

ICS87004I Differential-to-LVCMOS/LVTTL Zero Delay Clock Generator by IDT - Datasheet Preview — Datasheet preview – ICS87004I

Datasheet Details

Part number	ICS87004I
Manufacturer	IDT
File Size	733.10 KB
Description	Differential-to-LVCMOS/LVTTL Zero Delay Clock Generator
Datasheet	ICS87004I Datasheet
Additional preview pages of the ICS87004I datasheet.

Product details

Description

The ICS87004I is a highly versatile 1:4 Differential- ICS to-LVCMOS/LVTTL Clock Generator.The ICS87004I HiPerClockS™ has two selectable clock inputs.The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels.Internal bias on the nCLK0 and nCLK1 inputs allows the CLK0 and CLK1 inputs to accept LVCMOS/LVTTL.The ICS87004I has a fully integrated PLL and can be configured as a zero delay buffer, multiplier or divider and has an input and output frequency ra

Features

Four LVCMOS/LVTTL outputs, 7Ω typical output impedance.
Selectable CLK0/nCLK0 or CLK1/nCLK1 clock inputs.
CLKx/nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL.
Internal bias on nCLK0 and nCLK1 to support LVCMOS/LVTTL levels on CLK0 and CLK1 inputs.
Output frequency range: 15.625MHz to 250MHz.
Input frequency range: 15.625MHz to 250MHz.
VCO range: 250MHz to 500MHz.
External fe.

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Published: Apr 5, 2019 |