MT49H64M9 - 576Mb CIO Reduced Latency

This page provides the datasheet information for the MT49H64M9, a member of the MT49H16M36 576Mb CIO Reduced Latency family.

Datasheet Summary

Features

CIO RLDRAM 2 MT49H64M9.
64 Meg x 9 x 8 Banks MT49H32M18.
32 Meg x 18 x 8 Banks MT49H16M36.
16 Meg x 36 x 8 Banks Features.
533 MHz DDR operation (1.067 Gb/s/pin data rate).
38.4 Gb/s peak bandwidth (x36 at 533 MHz clock frequency).
Organization.
64 Meg x 9, 32 Meg x 18, and 16 Meg x 36 I/O.
8 banks.
Reduced cycle time (15ns at 533 MHz).
Nonmultiplexed addresses (address multiplexing option available).

Micron

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Datasheet Details

Part number	MT49H64M9
Manufacturer	Micron
File Size	1.43 MB
Description	576Mb CIO Reduced Latency
Datasheet	MT49H64M9 Datasheet
Additional preview pages of the MT49H64M9 datasheet.

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Full PDF Text Transcription

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576Mb: x9 x18 x36 CIO RLDRAM 2 Features CIO RLDRAM 2 MT49H64M9 – 64 Meg x 9 x 8 Banks MT49H32M18 – 32 Meg x 18 x 8 Banks MT49H16M36 – 16 Meg x 36 x 8 Banks Features • 533 MHz DDR operation (1.067 Gb/s/pin data rate) • 38.

Published: Dec 7, 2017 |