Description
ZL30167 Dual Clock Translator Data Sheet .
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Precise Frequency Monitor (PFM)
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Guard Soak Timer (GST)
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Figure 14 "Typical Power-Up Reset and
Configuration Circuit"
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5.
Features
* Two independent clock channels
* Two programmable digital PLLs/Numerically Controlled Oscillators (NCOs)
* Four precision synthesizers generate any clockrate from 1 Hz to 750 MHz with low jitter for 10 G PHYs
* Programmable digital PLLs synchronize to any clock rate
Applications
* OTN muxponders and transponders
* 10 Gigabit line cards
* Synchronous Ethernet, 10 GBASE-R and 10 GBASE-W
* SONET/SDH, Fibre Channel, XAUI
Data Sheet
2
Zarlink Semiconductor Inc. ZL30167
Data Sheet
Change History
Below are the changes from the March 2014 issue