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ZL30167 Dual Clock Translator

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Description

ZL30167 Dual Clock Translator Data Sheet .
17 Precise Frequency Monitor (PFM) 18 Guard Soak Timer (GST) 31 Figure 14 "Typical Power-Up Reset and Configuration Circuit" 32 5.

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Features

* Two independent clock channels
* Two programmable digital PLLs/Numerically Controlled Oscillators (NCOs)
* Four precision synthesizers generate any clockrate from 1 Hz to 750 MHz with low jitter for 10 G PHYs
* Programmable digital PLLs synchronize to any clock rate

Applications

* OTN muxponders and transponders
* 10 Gigabit line cards
* Synchronous Ethernet, 10 GBASE-R and 10 GBASE-W
* SONET/SDH, Fibre Channel, XAUI Data Sheet 2 Zarlink Semiconductor Inc. ZL30167 Data Sheet Change History Below are the changes from the March 2014 issue

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Dual Clock Translator Microsemi
Microsemi ZL30167-like datasheet