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ZL30169 Clock Translator

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Description

Register Map: Section 6.2 .
8 5.

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Features

* Input Clocks
* Three inputs, two differential/CMOS, one CMOS
* Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS)
* Inputs continually monitored for activity and frequency accuracy
* Automatic or manual reference switching
* Low-Bandw

Applications

* Telecom OTN and FEC frequency conversion
* Frequency conversion and jitter attenuation in a wide variety of equipment types IC1P, IC1N IC2P, IC2N IC3P/GPIO3 HSDIV1 HSDIV2 HSDIV3 Input Block Divider, Monitor, Selector Figure 8 DPLL Hitless Switching, Jitter Filtering, Holdover F

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