FDC6302P

Dual P-Channel MOSFET

ON Semiconductor

FDC6302P Features

* -25 V, -0.12 A continuous, -0.5 A Peak. RDS(ON) = 13 Ω @ VGS= -2.7 V RDS(ON) = 10 Ω @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace multiple PNP digital transistors (I

FDC6302P General Description

These Dual P-Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize onstate resistance. This device has been designed especially for low vol.

FDC6302P Datasheet (343.75 KB)