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MTB3N100E High Energy Power FET

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Description

MTB3N100E Designer’s™ Data Sheet TMOS E *FET.™ High Energy Power FET D2PAK for Surface Mount N *Channel Enhancement *Mode Sili.

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Features

* dds to the resistance of the driving source, but the internal resistance is difficult to measure and, consequently, is not specified. The resistive switching time variation versus gate resistance (Figure 9) shows how typical switching performance is affected by the parasitic circuit elements. If the

Applications

* that require the use of surface mount components with higher power and lower RDS(on) capabilities. This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage
* blocking capability without degrading performance over time. In addition, this advanced TMOS E
* F

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