74VHCT126A Datasheet (STMicroelectronics)

74VHCT126A, QUAD BUS BUFFERS

The 74VHCT126A is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

This device requires the 3-STATE control input G to be set low to place the output into the high impedance state.

Power down protection is provided

® 74VHCT126A QUAD BUS BUFFERS (3-STATE) PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 126 IMPROVED LATCH-UP I