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CY7C1007D - 1-Mbit (1 M x 1) Static RAM

This page provides the datasheet information for the CY7C1007D, a member of the CY7C107D 1-Mbit (1 M x 1) Static RAM family.

Description

The CY7C107D [1] and CY7C1007D [1] are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit.

Easy memory expansion is provided by an active LOW Chip Enable (CE) and tri-state drivers.

Features

  • Pin- and function-compatible with CY7C107B/CY7C1007B.
  • High speed.
  • tAA = 10 ns.
  • Low active power.
  • ICC = 80 mA @ 10 ns.
  • Low complementary metal oxide semiconductor (CMOS) standby power.
  • ISB2 = 3 mA.
  • 2.0 V data retention.
  • Automatic power-down when deselected.
  • CMOS for optimum speed/power.
  • Transistor transistor logic (TTL) compatible inputs and outputs.
  • CY7C107D available in Pb-free 28-pin 400-Mil wide Molded SOJ package. CY7C1007D availab.

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Datasheet preview – CY7C1007D

Datasheet Details

Part number CY7C1007D
Manufacturer Cypress (now Infineon)
File Size 776.33 KB
Description 1-Mbit (1 M x 1) Static RAM
Datasheet download datasheet CY7C1007D Datasheet
Additional preview pages of the CY7C1007D datasheet.

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Full PDF Text Transcription

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CY7C107D CY7C1007D 1-Mbit (1 M × 1) Static RAM 1-Mbit (1 M × 1) Static RAM Features ■ Pin- and function-compatible with CY7C107B/CY7C1007B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA @ 10 ns ■ Low complementary metal oxide semiconductor (CMOS) standby power ❐ ISB2 = 3 mA ■ 2.0 V data retention ■ Automatic power-down when deselected ■ CMOS for optimum speed/power ■ Transistor transistor logic (TTL) compatible inputs and outputs ■ CY7C107D available in Pb-free 28-pin 400-Mil wide Molded SOJ package. CY7C1007D available in Pb-free 28-pin 300-Mil wide Molded SOJ package Functional Description The CY7C107D [1] and CY7C1007D [1] are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit.
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