CY7C1261V18 Datasheet - Cypress Semiconductor

CY7C1261V18, 1.8V Synchronous Pipelined SRAM

CY7C1261V18, CY7C1276V18 CY7C1263V18, CY7C1265V18 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) .

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Datasheet Details

Part number:

CY7C1261V18

Manufacturer:

Cypress Semiconductor

File Size:

404.82 KB

Description:

1.8V Synchronous Pipelined SRAM

Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 300 MHz to 400 MHz clock for high bandwidth
* 4-Word Burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 800 MHz) at 40

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CY7C1261V18 1.8V Synchronous Pipelined SRAM Cypress Semiconductor

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