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CY7C1264XV18, CY7C1262XV18 Datasheet - Cypress Semiconductor

CY7C1264XV18 - 36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture

CY7C1264XV18 Features

* Separate independent read and write data ports

* Supports concurrent transactions

* 450 MHz clock for high bandwidth

* Two-word burst for reducing address bus frequency

* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 900 MHz) at 450 MHz

CY7C1262XV18-CypressSemiconductor.pdf

This datasheet PDF includes multiple part numbers: CY7C1264XV18, CY7C1262XV18. Please refer to the document for exact specifications by model.
CY7C1264XV18 Datasheet Preview Page 2 CY7C1264XV18 Datasheet Preview Page 3

Datasheet Details

Part number:

CY7C1264XV18, CY7C1262XV18

Manufacturer:

Cypress Semiconductor

File Size:

1.04 MB

Description:

36-mbit qdr ii+ xtreme sram two-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1264XV18, CY7C1262XV18.
Please refer to the document for exact specifications by model.

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