CY7C1264XV18, CY7C1262XV18 Datasheet - Cypress Semiconductor

CY7C1264XV18, CY7C1262XV18, 36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture

CY7C1262XV18 CY7C1264XV18 36-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit QDR® II+ Xtreme SRAM Two-Word Bur.

datasheet Preview Page 1 from Datasheet4u.com

CY7C1262XV18-CypressSemiconductor.pdf

CY7C1264XV18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1264XV18, CY7C1262XV18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1264XV18, CY7C1262XV18

Manufacturer:

Cypress Semiconductor

File Size:

1.04 MB

Description:

36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture

Note:

This datasheet PDF includes multiple part numbers: CY7C1264XV18, CY7C1262XV18.
Please refer to the document for exact specifications by model.

Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 450 MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 900 MHz) at 450 MHz

CY7C1264XV18 Distributors

📁 Related Datasheet

CY7C1006D CY7C1011G CY7C1041G CY7C1041GE CY7C1041GN CY7C1049GN

📌 All Tags

CY7C1262XV18 36-Mbit QDR II + Xtreme SRAM Two-Word Burst Architecture Cypress Semiconductor

Cypress Semiconductor CY7C1264XV18-like datasheet