CY7C1297F - 1-Mbit (64K x 18) Flow-Through Sync SRAM

Product Overview

Cypress Semiconductor

Datasheet Details

Part number	CY7C1297F
Manufacturer	Cypress Semiconductor
File Size	440.42 KB
Description	1-Mbit (64K x 18) Flow-Through Sync SRAM
Datasheet	CY7C1297F Datasheet
Additional preview pages of the CY7C1297F datasheet.

Product details

Description

1] The CY7C1297F is a 131,072 x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic.Maximum access delay from clock rise is Logic Block Diagram A0,A1,A MODE ADV CLK ADDRESS REGISTER A[1:0] BURST Q1 COUNTER AND LOGIC CLR Q0 ADSC ADSP DQB,DQPB WRITE REGISTER DQB,DQPB WRITE DRIVER BWB MEMORY ARRAY SENSE AMPS OUTPUT BUFFERS BWA BWE GW CE1 CE2 CE3 OE DQA,DQPA WRITE REGISTER DQA,DQPA WRITE DRIVER INPUT REGISTERS DQs DQPA DQPB ENABLE REGIST

Features

64K x 18 common I/O.
3.3V.
5% and +10% core power supply (VDD).
3.3V I/O supply (VDDQ).
Fast clock-to-output times.
6.5 ns (133-MHz version).
7.5 ns (117-MHz version).
Provide high-performance 2-1-1-1 access rate.
User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences.
Separate processor and controller address strobes.
Synchronous self-timed write.
A.

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Published: Apr 27, 2011 |