CY7C1298F Datasheet - Cypress Semiconductor

CY7C1298F 1-Mbit (64K x 18) Pipelined DCD Sync SRAM

1] The CY7C1298F SRAM integrates 65,536x18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The synchronous inputs include all address.

CY7C1298F Features

* Registered inputs and outputs for pipelined operation

* Optimal for performance (Double-Cycle deselect)

* Depth expansion without wait state

* 64K × 18-bit common I/O architecture

* 3.3V

* 5% and +10% core power supply (VDD)

* 3.3V I/O supply

CY7C1298F_CypressSemiconductor.pdf

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Datasheet Details

Part number:

CY7C1298F

Manufacturer:

Cypress Semiconductor

File Size:

361.00 KB

Description:

1-mbit (64k x 18) pipelined dcd sync sram.

CY7C1298F Distributor

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CY7C1298F CY7C1298F 1-Mbit 64K Pipelined DCD Sync SRAM Cypress Semiconductor