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CY7C1303BV18 18-Mbit Burst of 2 Pipelined SRAM

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Description

CY7C1303BV18 CY7C1306BV18 18-Mbit Burst of 2 Pipelined SRAM with QDR™ Architecture .
Separate independent Read and Write data ports. Supports concurrent transactions. 167-MHz Clock for high bandwidth.

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Datasheet Specifications

Part number
CY7C1303BV18
Manufacturer
Cypress Semiconductor
File Size
677.60 KB
Datasheet
CY7C1303BV18-CypressSemiconductor.pdf
Description
18-Mbit Burst of 2 Pipelined SRAM

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