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CY7C1371DV25

(CY7C1371DV25 / CY7C1373DV25) Flow-Through SRAM

CY7C1371DV25 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles

* Can support up to 133-MHz bus operations with zero wait states

* Data is transferred on every clock

* Pin compatible and functionally equivalent to ZBT™ devices

* Int

CY7C1371DV25 General Description

1] The CY7C1371DV25/CY7C1373DV25 is a 2.5V, 512K x 36/1M x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371DV25/CY7C1373DV25 is equipped with the advanced No Bus Latency (NoBL).

CY7C1371DV25 Datasheet (486.89 KB)

Preview of CY7C1371DV25 PDF

Datasheet Details

Part number:

CY7C1371DV25

Manufacturer:

Cypress Semiconductor

File Size:

486.89 KB

Description:

(cy7c1371dv25 / cy7c1373dv25) flow-through sram.

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TAGS

CY7C1371DV25 CY7C1371DV25 CY7C1373DV25 Flow-Through SRAM Cypress Semiconductor

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