CY7C1413JV18 - (CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture
The CY7C1411JV18, CY7C1426JV18, CY7C1413JV18, and CY7C1415JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture.
QDR-II architecture consists of two separate ports to access the memory array.
The read port has dedicated data outputs to support the read operations and the writ
CY7C1413JV18 Features
* Configurations CY7C1411JV18
* 4M x 8 CY7C1426JV18
* 4M x 9 CY7C1413JV18
* 2M x 18 CY7C1415JV18
* 1M x 36 Separate independent read and write data ports
* Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address bu
