CY7C1413KV18 - 36-Mbit QDR II SRAM Four-Word Burst Architecture
CY7C1413KV18 Features
* Separate independent read and write data ports
* Supports concurrent transactions
* 333 MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) Interfaces on both read and write ports (data transferred at 666 MHz) at 333 MHz
