CY7C15632KV18 Datasheet - Cypress Semiconductor

CY7C15632KV18 72-Mbit QDR II+ SRAM Four-Word Burst Architecture

CY7C15632KV18 Features

* Separate Independent Read and Write Data Ports

* Supports concurrent transactions

* 500 MHz Clock for High Bandwidth

* Four-word Burst for Reducing Address Bus Frequency

* Double Data Rate (DDR) Interfaces on both Read and Write Ports (data transferred at 1000 MHz) at 500 MHz

Datasheet Details

CY7C15632KV18

Cypress Semiconductor

427.43 KB

72-mbit qdr ii+ sram four-word burst architecture.

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