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CY7C1463BV33 36-Mbit (2 M x 18) Flow-Through SRAM

CY7C1463BV33 Description

CY7C1463BV33 36-Mbit (2 M × 18) Flow-Through SRAM with NoBL™ Architecture 36-Mbit (2 M × 18) Flow-Through SRAM with NoBL™ Architecture .

CY7C1463BV33 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Supports up to 133-MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin-compatible and functionally equivalent to ZBT™ devices
* Internally self timed outp

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Datasheet Details

Part number
CY7C1463BV33
Manufacturer
Cypress Semiconductor
File Size
489.59 KB
Datasheet
CY7C1463BV33-CypressSemiconductor.pdf
Description
36-Mbit (2 M x 18) Flow-Through SRAM

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