* S D = Drain, TAB = Drain D (TAB) z International standard packages z Low RDS (on) HDMOSTM process z Rugged polysilicon gate cell structure z Unclamped Inductive Switching (UIS) rated z Low package inductance - easy to drive and to protect z Fast intrinsic Rectifier B Symbol Test Conditions O V
IXTT75N10
IXYS
1.11 MB
N-channel mosfet.
MegaMOSTMFET
N-Channel Enhancement Mode
IXTH / IXTM 67N10 IXTH / IXTM 75N10 IXTT 75N10
VDSS
100 V 100 V
ID25
67 A 75 A
RDS(on)
25 mΩ 20 mΩ
TO-247.
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