SY10-100EP451L Datasheet (Micrel Semiconductor) - 3.3V ECL 6-Bit Differential Register

SY10-100EP451L, 3.3V ECL 6-Bit Differential Register

The SY10/100EP451L is a 6-bit fully differential register with common clock and single-ended Master Reset (MR).

It is ideal for very high frequency applications where a registered data path is necessary.

All inputs have an internal 75kΩ pull-down resistor.

Differential inputs have an override clamp.

SY10-100EP451L Features

* 450ps typical propagation delay

* Maximum frequency > 3.0GHz typical

* Asynchronous Master Reset

* 20ps skew within device, 35ps skew device-to-device

* PECL mode operating range:

* VCC = 3.0V to 3.6V with VEE = 0V

* NECL mode operating range