FDC653N Datasheet | Fairchild Semiconductor

Description This N-Channel enhancement mode power field effect transistors is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook puters, portable phones, PCMICA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. Features 5 A, 30 V. RDS(ON) = 0.035 Ω @ VGS = 10 V RDS(ON) = 0.055 Ω @ VGS = 4.5 V. Proprietary Super SOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOT-23 Super SOTTM-6 Super SOTTM-8 SO-8 SOT-223 SOIC-16 3 .65 G pin 1 Super SOT -6 Absolute Maximum Ratings Symbol Parameter VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Maximum Power Dissipation T A = 25°C unless otherwise note FDC653N 30 ±20 (Note 1a) Units V V A 5 15 (Note 1a) (Note 1b) 1.6 0.8 -55 to 150 TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 30 °C/W °C/W © 1997 Fairchild Semiconductor Corporation FDC653N...