CY7 Datasheet | Specifications & PDF Download

1CY 7C42 65 fax id: 5413 PRELIMINARY CY7C4255 CY7C4265 8K/16Kx18 Deep Sync FIFOs Features • High-speed, low-power, first-in first-out (FIFO) memor

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36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) CY7C

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CY7C1305BV18 CY7C1307BV18 18-Mbit Burst of 4 Pipelined SRAM with QDR™ Architecture Features Functional Description • Separate independent Read and

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CY7C4221 CY7C42311 K / 2 K × 9 Synchronous FIFOs CY7C4221 / CY7C4231 1 K / 2 K × 9 Synchronous FIFOs 1 K / 2 K × 9 Synchronous FIFOs Features ■ High

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1-Mbit (128 K × 8) Static RAM Features ■ Temperature Ranges ❐ Industrial: –40 °C to 85 °C ❐ Automotive-A: –40 °C to 85 °C ■ Pin and Function compatibl

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CY7C9689 TAXI™ Compatible HOTLink® Transceiver Features Second-generation HOTLink® technology AMD™ AM7968/7969 TAXIchip™ compatible 8-bit 4B/5B or 10

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CY7C1034DV33 6-Mbit (256K X 24) Static RAM Features ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 175 mA at f = 100 MHz ■ Low CMOS standby po

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www.DataSheet4U.com CY7C0430BV CY7C0430CV 10 Gb/s 3.3V QuadPort™ DSE Family Features • QuadPort™ datapath switching element (DSE) family allows four

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CY7C43642 CY7C43662 CY7C43682 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO Features • High-speed, low-power, bidirectional, First-In, First-Out (F

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86 CY7C186 8Kx8 Static RAM Features • High speed — 20 ns • Low active power — 605 mW • Low standby power — 110 mW • CMOS for optimum speed/power • E

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D Function and Pinout Compatible With FCT and F Logic D 25-W Output Series Resistors to Reduce Transmission-Line Reflection Noise D Reduced VOH (Typic

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CY7C1338G 4-Mbit (128K × 32) Flow-Through Sync SRAM 4-Mbit (128K × 32) Flow-Through Sync SRAM Features ■ 128K × 32 common I/O ■ 3.3 V core power supp

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CY7C25632KV18 CY7C25652KV18 72-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 72-Mbit QDR® II+ SRAM Four-Word Burs

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CY7C1613KV18/CY7C1615KV18 144-Mbit QDR® II SRAM Four-Word Burst Architecture 144-Mbit QDR® II SRAM Four-Word Burst Architecture Features ■ Separate i

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CY7C245A 2K x 8 Reprogrammable Registered PROM Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 15-ns address

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CY7C1323BV25 18-Mbit 4-Word Burst SRAM with DDR-I Architecture Features Functional Description • 18-Mbit Density (512 Kbit x 36) • 167-MHz Clock f

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CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 1K x 8 Dual-Port Static RAM Features ■ True dual-ported memory cells, which allow simultaneous r

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CY7C63413C CY7C63513C CY7C63613C Low-Speed High Input/Output 1.5-Mbps USB Controller Features ■ Low-cost solution for low-speed applications with hig

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