.
Hitachi Semiconductor
74LS112 - Dual J-K Negative-edge-triggered Flip-Flops
19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hit.
Fairchild Semiconductor
74S112 - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised April 2000 DM74S1.
Renesas
HD74LS107A - Dual J-K Negative-edge-triggered Flip-Flops
HD74LS107A Dual J-K Negative-edge-triggered Flip-Flops (with Clear) REJ03D0425–0300 Rev.3.00 Jul.13.2005 Features • Ordering Information Part Name .
Motorola
74LS73 - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are.
Texas Instruments
54AC11112 - DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
54AC11112, 74AC11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCAS073A – JUNE 1989 – REVISED APRIL 1993 • Flow-Through Archi.
Texas Instruments
74ACT11112 - DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP
74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A – D3339, JUNE 1989 – REVISED APRIL 1993 • Inputs Are TTL-Voltage.
Hitachi Semiconductor
HD74LS114 - Dual J-K Negative-edge-triggered Flip-Flops
Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0.
Fairchild Semiconductor
74F112 - Dual JK Negative Edge-Triggered Flip-Flop
74F112 Dual JK Negative Edge-Triggered Flip-Flop April 1988 Revised July 1999 74F112 Dual JK Negative Edge-Triggered Flip-Flop General Description T.
Fairchild Semiconductor
74F114 - Dual JK Negative Edge-Triggered Flip-Flop
74F114 Dual JK Negative Edge-Triggered Flip-Flop April 1988 Revised August 1999 74F114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks .
Motorola
74LS112A - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS112A dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs.
Fairchild Semiconductor
74LS112A - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised March 2000 DM74.
National Semiconductor
DM74LS107A - Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops
DM54LS107A DM74LS107A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs June 1989 DM54LS107A DM74LS107A .
Fairchild Semiconductor
DM74S112 - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised April 2000 DM74S1.
Texas Instruments
74AC11112 - DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
54AC11112, 74AC11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCAS073A – JUNE 1989 – REVISED APRIL 1993 • Flow-Through Archi.
Renesas
HD74LS112 - Dual J-K Negative-edge-triggered Flip-Flops
HD74LS112 Dual J-K Negative-edge-triggered Flip-Flops (with Preset and Clear) REJ03D0426–0300 Rev.3.00 Jul.13.2005 Features • Ordering Information P.
Fairchild Semiconductor
DM74LS112A - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs August 1986 Revised March 2000 DM74.
NXP
74F113 - Dual J-K negative edge-triggered flip-flops
INTEGRATED CIRCUITS 74F113 Dual J-K negative edge-triggered flip-flops without reset Product specification IC15 Data Handbook 1991 Feb 14 Philips Se.
Fairchild Semiconductor
74F113 - Dual JK Negative Edge-Triggered Flip-Flop
74F113 Dual JK Negative Edge-Triggered Flip-Flop April 1988 Revised July 1999 74F113 Dual JK Negative Edge-Triggered Flip-Flop General Description T.
Renesas
HD74ACT112 - Dual JK Negative Edge-Triggered Flip-Flop
HD74AC112/HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop REJ03D0244–0200Z (Previous ADE-205-364 (Z)) Rev.2.00 Jul.16.2004 Description The HD74A.
Renesas
HD74AC112 - Dual JK Negative Edge-Triggered Flip-Flop
HD74AC112/HD74ACT112 Dual JK Negative Edge-Triggered Flip-Flop REJ03D0244–0200Z (Previous ADE-205-364 (Z)) Rev.2.00 Jul.16.2004 Description The HD74A.