DLKPC192S (ETCTI)
10-Gbps Ethernet LAN Physical Coding Sublayer (PCS) with SSTL XGMII Interface
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10-Gbps Ethernet LAN Physical Coding Sublayer (PCS) with SSTL XGMII Interface
PLL Clock Driver for 2.5V SSTL 2 DDR SDRAM Memory
2.5V Single-Ended to SSTL_2 Clock Driver
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 16-bit 4-bank/8-Mword 8-bit 4-bank/ 16-Mword 4-bit 4-bank
Dual Output Phase Controlled SSTL-3/PECL Clock Generator
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 16-bit 4-bank/8-Mword 8-bit 4-bank/ 16-Mword 4-bit 4-bank
1:1 14-bit SSTL_2 Registered Buffer
1:1 14-bit SSTL_2 Registered Buffer
256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 16-bit 4-bank/8-Mword 8-bit 4-bank/ 16-Mword 4-bit 4-bank
14-bit SSTL_2 registered driver
1:1 14-bit SSTL_2 Registered Buffer
Value SSTL_2 Clock Driver
DDR PC1600-PC3200 14-bit SSTL_2 registered driver
13-bit 1:2 SSTL_2 registered buffer
Dual Output Phase Controlled SSTL_3/PECL Clock Generator
1:1 14-bit SSTL-2 Registered Buffer
14-bit SSTL_2 registered
14-bit SSTL_2 registered driver
2.5 V 13-bit to 26-bit SSTL_2 registered buffer
13-bit 1:2 SSTL_2 registered buffer
SSTL_2 Distributor