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CY7C1219H 1-Mbit (32K x 36) Pipelined DCD Sync SRAM

CY7C1219H Description

CY7C1219H www.DataSheet4U.com 1-Mbit (32K x 36) Pipelined DCD Sync SRAM .
1] The CY7C1219H SRAM integrates 32K x 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

CY7C1219H Features

* Registered inputs and outputs for pipelined operation
* Optimal for performance (Double-Cycle deselect)
* Depth expansion without wait state
* 32K × 36-bit common I/O architecture
* 3.3V core power supply (VDD)
* 2.5V/3.3V I/O power supply (VDDQ)

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Datasheet Details

Part number
CY7C1219H
Manufacturer
Cypress Semiconductor
File Size
398.39 KB
Datasheet
CY7C1219H_CypressSemiconductor.pdf
Description
1-Mbit (32K x 36) Pipelined DCD Sync SRAM

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📌 All Tags

1-Mbit 32K Pipelined DCD Sync SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1219H-like datasheet