FDG6301N Datasheet - Fairchild Semiconductor

FDG6301N Dual N-Channel/ Digital FET

These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage a.

FDG6301N Features

* 25 V, 0.22 A continuous, 0.65 A peak. RDS(ON) = 4 Ω @ VGS= 4.5 V, RDS(ON) = 5 Ω @ VGS= 2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). Gate-Source Zener for ESD ruggedness (>6kV Human Body Model). Compact industry standard SC70-6 surface mou

FDG6301N Datasheet (226.61 KB)