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FDG6302P Datasheet - Fairchild Semiconductor

FDG6302P - Dual P-Channel/ Digital FET

These dual P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.

This very high density process is especially tailored to minimize on-state resistance.

This device has been designed especially for low voltage a

FDG6302P Features

* -25 V, -0.14 A continuous, -0.4 A peak. RDS(ON) = 10 Ω @ VGS= -4.5 V, RDS(ON) = 13 Ω @ VGS= -2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits (VGS(th) < 1.5 V). Gate-Source Zener for ESD ruggedness (>6kV Human Body Model). Compact industry standard SC70-6 surfa

FDG6302P_FairchildSemiconductor.pdf

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Datasheet Details

Part number:

FDG6302P

Manufacturer:

Fairchild Semiconductor

File Size:

302.73 KB

Description:

Dual p-channel/ digital fet.

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