NDS352AP P-Channel Logic Level Enhancement Mode Field Effect Transistor

Fairchild

Description

February 1997 NDS352AP P-Channel Logic Level Enhancement Mode Field Effect Transistor General .
These P -Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS techn.

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Datasheet Specifications

Part number: NDS352AP
Manufacturer: Fairchild
File Size: 78.57 KB
Datasheet: NDS352AP_FairchildSemiconductor.pdf
Description: P-Channel Logic Level Enhancement Mode Field Effect Transistor

Features

* -0.9 A, -30 V. RDS(ON) = 0.5 Ω @ VGS = -4.5 V RDS(ON) = 0.3 Ω @ VGS = -10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance an

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P-Channel Logic Level Enhancement Mode Field Effect Transistor Fairchild

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