Datasheet Specifications
- Part number
- ICS8752
- Manufacturer
- Renesas ↗
- File Size
- 376.70 KB
- Datasheet
- ICS8752-Renesas.pdf
- Description
- LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
Description
ICS8752 LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER GENERAL .Features
* Fully integrated PLLApplications
* The CLK_SEL input determines which reference clock is used. The output divider values of Bank A and B are controlled by the DIV_SELA0:1, and DIV_SELB0:1, respectively. For test and system debug purposes, the PLL_SEL input allows the PLL to be bypassed. When HIGH, the MR/nOE input resets the internaICS8752 Distributors
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