TC58NS256DC Datasheet - Toshiba Semiconductor

TC58NS256DC TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 256-MBIT CMOS NAND E2PROM

2 TM ) The TC58NS256 is a single 3.3-V 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 2048 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the.

TC58NS256DC Features

* Organization Memory cell array 528 × 64K × 8 Register 528 × 8 Page size 528 bytes Block size (16K + 512) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read Mode control Serial input/output, Command control Complies with the SmartMediaTM Electrical Specification and D

TC58NS256DC_ToshibaSemiconductor.pdf