CY7C1411BV18, CY7C1413BV18 Datasheet - Cypress Semiconductor

CY7C1411BV18 (CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture

The CY7C1411BV18, CY7C1426BV18, CY7C1413BV18, and CY7C1415BV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The read port has dedicated data outputs to support the read operations and the writ.

CY7C1411BV18 Features

* Configurations CY7C1411BV18

* 4M x 8 CY7C1426BV18

* 4M x 9 CY7C1413BV18

* 2M x 18 CY7C1415BV18

* 1M x 36 Separate independent read and write data ports

* Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address bu

CY7C1413BV18_CypressSemiconductor.pdf

CY7C1411BV18 Datasheet Preview — This datasheet PDF includes multiple part numbers: CY7C1411BV18, CY7C1413BV18. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

CY7C1411BV18, CY7C1413BV18

Manufacturer:

Cypress Semiconductor

File Size:

757.79 KB

Description:

(cy7c14xxbv18) 36-mbit qdr-ii sram 4-word burst architecture.

Note:

This datasheet PDF includes multiple part numbers: CY7C1411BV18, CY7C1413BV18.
Please refer to the document for exact specifications by model.

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TAGS

CY7C1411BV18 CY7C1413BV18 CY7C14xxBV18 36-Mbit QDR-II SRAM 4-Word Burst Architecture Cypress Semiconductor

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